On-chip Compression of Output Responses with Unknown Values Using LFSR Reseeding
نویسندگان
چکیده
We propose a procedure for designing an LFSRbased circuit for masking of unknown output values that appear in the output response of a circuit tested using LBIST. The procedure is based on reseeding of the LFSR to mask unknown output values while allowing fault effects to propagate. To determine the seeds, the output response of the circuit is partitioned into a minimal number of fragments, and a seed is computed for every fragment.
منابع مشابه
Reseeding methodology for low power based on LFSR
Power dissipation during test is a significant problem as the size and complexity of systems-onchip (SOCs) continue to grow. During scan shifting, more transitions occur in the flip-flops compared to what occurs during normal functional operation. This problem is further pseudorandom filling of the unassigned input values is employed. Excessive power dissipation during test can increase manufac...
متن کاملA New Scan Architecture for Both Low Power Testing and Test Volume Compression Under SOC Test Environment
A new scan architecture for both low power testing and test volume compression is proposed. For low power test requirements, only a subset of scan cells is loaded with test stimulus and captured with test responses by freezing the remaining scan cells according to the distribution of unspecified bits in the test cubes. In order to optimize the proposed process, a novel graph-based heuristic is ...
متن کاملOptimization of Scan Time of Scan Test in System-on-chip
We present an SoC testing approach that integrates test data compression, T AM/test wrapper design, and test scheduling. An improved LFSR reseeding technique is used as the compression engine. All cores on the SoC share a single on-chip LFSR. At any clock cycle, one or more cores can simultaneously receive data from the LFSR. Seeds for the LFSR are computed from the care bits from the test cube...
متن کاملEffective LFSR Reseeding Technique for Achieving Reduced Test Pattern
Aim of this study is to focus on reducing test pattern with effective Linear Feedback Shift Register (LFSR) reseeding. Test data volume of modern devices for testing increases rapidly corresponding to the size and complexity of the Systems-on-Chip (SoC). LFSR is a good pseudorandom pattern generator, which generates all possible test vectors with the help of the tap sequence. It can achieve hig...
متن کاملTest Pattern Generation Using Lfsr with Reseeding Scheme for Bist Designs
TEST PATTERN GENERATION USING LFSR WITH RESEEDING SCHEME FOR BIST DESIGNS Leeba Varghese, Suranya G Electronics and Communication Department/ MG University MG University/ Ilahia College of Engineering and Technology Ilahia College of Engineering and Technology Mulavoor P.O, Muvattupuzha Pin: 686673 Kerala India ____________________________________________________________________________________...
متن کامل